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    ** 18TH NEWS UPDATE ** FastCache040+ 2.4...

    ** 18TH NEWS UPDATE **

    FastCache040+ 2.4 released.

    2.3 - The 16 byte alignment code is back and now avoids the
    change of cache mode for this specific case. Removed
    Continue case from PreDMA...
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    ** 17TH NEWS UPDATE ** FastCache040+ 2.0 is...

    ** 17TH NEWS UPDATE **

    FastCache040+ 2.0 is no longer available and 2.2 is now the recommended version for all users. 2.2 is a little slower than 2.0 but it is also much more stable than 2.0. I...
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    ** 16TH NEWS UPDATE ** FastCache040+ 2.2...

    ** 16TH NEWS UPDATE **

    FastCache040+ 2.2 released

    v2.2 - The Snoopy fix broke MEMF_24BIT transfers. So another
    bug fix was required. Let's hope it's the last.
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    ** 15TH NEWS UPDATE ** FastCache040+ 2.1...

    ** 15TH NEWS UPDATE **

    FastCache040+ 2.1 released

    v2.1 - Reworked the code to fix a problem with Snoopy 2.0 (Aminet).
    Sorry, this version no longer supports 16 byte aligned cache enabled...
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    I'm not going to worry too much about the...

    I'm not going to worry too much about the Store/Load bypass bug fix (affecting certain 060 mask revisions) because I think it's fairly well supported already. If the 68060.library doesn't handle it...
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    ** 14TH NEWS UPDATE ** FastCache040+ 2.0...

    ** 14TH NEWS UPDATE **

    FastCache040+ 2.0 released.

    2.0 - Added code to enable only one DTTR when the Nest count
    is one. Most systems have only one DMA driver and only need to
    have 16MB of...
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    ** 13TH NEWS UPDATE ** FixMapP5 1.4 released ...

    ** 13TH NEWS UPDATE **

    FixMapP5 1.4 released

    v1.4 - Added code to determine the Chip RAM start address from the
    system memory list. Hopefully, this solves the problem with
    ...
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    ** 12TH NEWS UPDATE ** FixMapP5 1.3 released ...

    ** 12TH NEWS UPDATE **

    FixMapP5 1.3 released

    v1.3 - Swapped order of 68040/060 library test. Some OS 3.1
    systems use a dummy 68040.library (which does not expunge)
    and prevented...
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    ** 11TH NEWS UPDATE ** v1.9 Released! - Fixed...

    ** 11TH NEWS UPDATE **

    v1.9 Released!
    - Fixed "D2 Register Not Preserved" coding bug in PreDMA.
    Most DMA drivers don't seem to need it preserved but
    Thanks to Cosmos for reporting it anyway....
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    ** 10TH NEWS UPDATE ** v1.8 Released! -...

    ** 10TH NEWS UPDATE **

    v1.8 Released!
    - Reworked the code to eliminate a serious (but seldom noticed) data transfer corruption bug for the case of multiple DMA drivers in the same system....
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    ** 9TH NEWS UPDATE ** FastCache040+ v1.6P5 has...

    ** 9TH NEWS UPDATE **

    FastCache040+ v1.6P5 has been removed. Phase5 68060.library users should use FixMapP5 before using this patch.

    FixMapP5 1.2 ©SpeedGeek 2018 (MMU Handler ©Michael Sinz...
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    ** 8TH NEWS UPDATE ** v1.6P5 Removed code to...

    ** 8TH NEWS UPDATE **

    v1.6P5 Removed code to allow PostDMA cache Flush for the case of
    16 byte aligned transfers. Added code to skip PostDMA
    cache Flush for the case of...
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    ** 7TH NEWS UPDATE ** v1.6 - Added code to...

    ** 7TH NEWS UPDATE **

    v1.6 - Added code to PostDMA to Flush the cache conditionally
    (if the Store buffer and cache are enabled). Added NOPs
    to sync the pipelines before RTE (CINVA...
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    ** 6TH NEWS UPDATE ** v1.5 - Found an...

    ** 6TH NEWS UPDATE **

    v1.5 - Found an occasional Recoverable Alert bug which could
    possibly result in a crash but only on 060 systems!
    The simple fix was to move "CINVA NC" in PostDMA to the...
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    ** 5TH NEWS UPDATE ** The new benchmark tool...

    ** 5TH NEWS UPDATE **

    The new benchmark tool has now been released! The lamers who failed to provide compatibility feedback owe a BIG THANKS to the users who did. A very special Thanks to...
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    Ok, here are images of the new improved benchmark...

    Ok, here are images of the new improved benchmark tool. Sadly, only 1 user has provided compatibility results so far? :roll:
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    ** 4TH NEWS UPDATE ** The was another stupid...

    ** 4TH NEWS UPDATE **

    The was another stupid version bug in v1.4 which has now been fixed (It was a just a fully functional v1.4 reporting itself as v1.3).

    I now have a simple benchmark tool...
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    Ok guys, now it's your turn to post your...

    Ok guys, now it's your turn to post your compatibility results!

    Please provide information on 68040.library or 68060.library vendor and version. Also, accelerator card type and vendor is...
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    ** 3RD NEWS UPDATE ** v1.3 Released! - Added...

    ** 3RD NEWS UPDATE **

    v1.3 Released!
    - Added code to change MEMF_24BIT transfers to NoCache.
    This eliminated all OldFunc calls. MEMF_24BIT transfers may have
    some CPU performance loss but the...
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    ** 2ND NEWS UPDATE ** v1.2 released (updated...

    ** 2ND NEWS UPDATE **

    v1.2 released (updated patch size info)
    - Added code to use OldCachePostDMA for MEMF_24BIT
    transfers (So MMU Pages can be restored to original)

    EDIT:
    OK, I believe I...
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    ** NEWS UPDATE ** Sorry, there was a bug in...

    ** NEWS UPDATE **

    Sorry, there was a bug in v1.0 with the patch install code. :Doh:

    v1.1 - Fixed a bug which prevented the patch from installing
    - Added code to use OldCachePreDMA for...
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    FastCache040+ Released!

    FastCache040+ 1.0 ©SpeedGeek 2017

    INTRODUCTION:
    FastCache040+ is a patch to replace the CachePreDMA() and
    CachePostDMA() functions of most 68040/060 libraries. While
    the old functions are...
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