I'd quote all the quotes, but go mad sorting things out, so just one:
Wow, so many replies
Harkonnen75 said:
It is necessary to clone hese. I propose to do a crowfounding to replicate hese!
Lolz :laugh:
I have so many projects that I'd like to do (some of them are already progressing) and so little time...
Agreeing with this ;-)
I'd suggest leaving the needed signal points for the 64MB memory hack handy (TH machine pin). I have personally replaced the A3000's ZIP RAM socket zone with the 16MB DRAM PCB on machine pin headers, and honestly, a PCB that has the GAL (for the different memory matrix type, and/or additional addressing) and space for 64MB of SMC DRAM on it is the better solution if one is going to just max the memory and be done with it. When building such, one leaves the sockets off the motherboard and the 64MB (or larger) memory PCB is inserted into them and also to the (proposed) spare address lines. It can sit safely below any accelerator on simple machine pin header pins (soldered in). This would minimize the need to go additional layers, too.
I actually have an Ultrasound 060 in my A4KT, and it was purpose built for the medical project, and not general consumption, so no need to support. The CPU board has custom interface positions that extend forward of the motherboard by about 2"/4.5cm to make use of the native A4KT case's space. Unless one has that kind of forward clearance in their case of choice, it won't work as you have noted. The QuikPak 4060, unless the first Z3 slot has moved closer to the CPU area, should still work, or an overlap will happen.
I have found the publicly-available ROMY GAL and PCB online - you have to dig on Cosmo's site IIRC. Through a 3rd party, I was told Cosmos has made his money back for the efforts some time ago. Others have since made and sold the ROMY PCBs from what he eventually published (I have a small PCB run here for both A3000 and A4000, just haven't gotten around to built them).
The 1MB ROM (additional 512K at E0) is a safe hack to expand with. I caution the 4MB version because there is some back and forth about the upper address space's purpose in the memory map that it would sit at (>16MB), and a possible conflict. I won't debate who's right. Maybe leave the option open enough to someone that wants to program the GAL logic one way or the other. If not directly supported, leave the needed pins for the address line(s) nearby so a riser PCB can inserted in directly so one doesn't have to put an inverted socket on an SMC Amiga chip.
Item to add: A jumper nearby for enable/disable pin-20 power for an IDE DOM (or self-powered CF adapter) on the IDE header. My HC533 and the IDE68K support power from the pin-20, but the A4KT doesn't. I like to use the Hyperdisk IDE DOM modules, and they support it. I've also debated putting in a 90-degree IDE header so a module can lay flat vs vertical. Inward won't work due to the ROMs on the official A4K, but outward would.
I agree that enough space for SMC GAL sockets to fit would be nice for the most likely GAL change-outs. Putting as many passives as possible on the back side is also a suggestion. Makes for a cleaner PCB to read any needed silkscreen writing. One could argue that it might be possible to get the rear side built by the PCB house fitted with passives. This would reduce the labor-intensive effort of the tiny parts to just 74-series logic, connectors, and Amiga chip additions by the purchaser on the top side.
Thanks for all of your efforts, which ever way you decide to go.